ti: k3: common: Add platform core management helpers

The K3 family of SoCs has multiple interconnects. The key interconnect
for high performance processors is the MSMC3 interconnect. This is
an io-coherent interconnect which exports multiple ports for each
processor cluster.

Sometimes, port 0 of the MSMC may not have an ARM cluster OR is isolated
such that the instance of ATF does not manage it. Define macros
in platform_def.h to help handle this.

Signed-off-by: Benjamin Fair <b-fair@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>

diff --git a/plat/ti/k3/common/k3_helpers.S b/plat/ti/k3/common/k3_helpers.S
new file mode 100644 (file)
index 0000000..40f9da9
--- /dev/null
+++ b/plat/ti/k3/common/k3_helpers.S
@@ -0,0 +1,94 @@
+/*
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <arch.h>
+#include <asm_macros.S>
+#include <platform_def.h>
+
+#define K3_BOOT_REASON_COLD_RESET 0x1
+
+       /* ------------------------------------------------------------------
+        *  uintptr_t plat_get_my_entrypoint(void)
+        * ------------------------------------------------------------------
+        *
+        * This function is called with the called with the MMU and caches
+        * disabled (SCTLR_EL3.M = 0 and SCTLR_EL3.C = 0). The function is
+        * responsible for distinguishing between a warm and cold reset for the
+        * current CPU using platform-specific means. If it's a warm reset,
+        * then it returns the warm reset entrypoint point provided to
+        * plat_setup_psci_ops() during BL31 initialization. If it's a cold
+        * reset then this function must return zero.
+        *
+        * This function does not follow the Procedure Call Standard used by
+        * the Application Binary Interface for the ARM 64-bit architecture.
+        * The caller should not assume that callee saved registers are
+        * preserved across a call to this function.
+        */
+       .globl  plat_get_my_entrypoint
+func plat_get_my_entrypoint
+       ldr x0, k3_boot_reason_data_store
+       cmp  x0, #K3_BOOT_REASON_COLD_RESET
+
+       /* We ONLY support cold boot at this point */
+       bne plat_unsupported_boot
+       mov     x0, #0
+       ret
+
+       /*
+        * We self manage our boot reason.
+        * At load time, we have just a default reason - which is cold reset
+        */
+k3_boot_reason_data_store:
+       .word   K3_BOOT_REASON_COLD_RESET
+
+plat_unsupported_boot:
+       b plat_unsupported_boot
+
+endfunc plat_get_my_entrypoint
+
+       /* ------------------------------------------------------------------
+        * unsigned int plat_my_core_pos(void)
+        * ------------------------------------------------------------------
+        *
+        * This function returns the index of the calling CPU which is used as a
+        * CPU-specific linear index into blocks of memory (for example while
+        * allocating per-CPU stacks). This function will be invoked very early
+        * in the initialization sequence which mandates that this function
+        * should be implemented in assembly and should not rely on the
+        * avalability of a C runtime environment. This function can clobber x0
+        * - x8 and must preserve x9 - x29.
+        *
+        * This function plays a crucial role in the power domain topology
+        * framework in PSCI and details of this can be found in Power Domain
+        * Topology Design.
+        */
+       .globl plat_my_core_pos
+func plat_my_core_pos
+       mrs     x0, MPIDR_EL1
+
+       and     x1, x0, #MPIDR_CLUSTER_MASK
+       lsr     x1, x1, #MPIDR_AFF1_SHIFT
+       and     x0, x0, #MPIDR_CPU_MASK
+
+#if K3_CLUSTER1_MSMC_PORT != UNUSED
+       cmp     x1, #K3_CLUSTER0_MSMC_PORT
+       b.eq out
+       add     x0, x0, #K3_CLUSTER0_CORE_COUNT
+#if K3_CLUSTER2_MSMC_PORT != UNUSED
+       cmp     x1, #K3_CLUSTER1_MSMC_PORT
+       b.eq out
+       add     x0, x0, #K3_CLUSTER1_CORE_COUNT
+#if K3_CLUSTER3_MSMC_PORT != UNUSED
+       cmp     x1, #K3_CLUSTER2_MSMC_PORT
+       b.eq out
+       add     x0, x0, #K3_CLUSTER2_CORE_COUNT
+#endif /* K3_CLUSTER3_MSMC_PORT != UNUSED */
+#endif /* K3_CLUSTER2_MSMC_PORT != UNUSED */
+#endif /* K3_CLUSTER1_MSMC_PORT != UNUSED */
+
+out:
+       ret
+endfunc plat_my_core_pos

diff --git a/plat/ti/k3/common/plat_common.mk b/plat/ti/k3/common/plat_common.mk
index 8ba2e84f5c895b5ecc9fa9c03d9a9c07134de0bb..65b71e39a86e90081750d6125c1f6175356cb1ba 100644 (file)
--- a/plat/ti/k3/common/plat_common.mk
+++ b/plat/ti/k3/common/plat_common.mk
@@ -35,3 +35,4 @@ PLAT_BL_COMMON_SOURCES        +=      \
 
 BL31_SOURCES           +=      \
                                ${PLAT_PATH}/common/k3_bl31_setup.c     \
+                               ${PLAT_PATH}/common/k3_helpers.S        \

diff --git a/plat/ti/k3/include/platform_def.h b/plat/ti/k3/include/platform_def.h
index eaeef5a21d2bd69f5b1b0a587e9db3b10f91c7f7..bac8af1958f7e11998720aee3629fbf46dcd3070 100644 (file)
--- a/plat/ti/k3/include/platform_def.h
+++ b/plat/ti/k3/include/platform_def.h
@@ -22,6 +22,46 @@
 #define PLATFORM_STACK_SIZE            0x1000
 #endif
 
+#define PLATFORM_SYSTEM_COUNT          1
+#define PLATFORM_CORE_COUNT            (K3_CLUSTER0_CORE_COUNT + \
+                                       K3_CLUSTER1_CORE_COUNT + \
+                                       K3_CLUSTER2_CORE_COUNT + \
+                                       K3_CLUSTER3_CORE_COUNT)
+
+#define PLATFORM_CLUSTER_COUNT         ((K3_CLUSTER0_MSMC_PORT != UNUSED) + \
+                                       (K3_CLUSTER1_MSMC_PORT != UNUSED) + \
+                                       (K3_CLUSTER2_MSMC_PORT != UNUSED) + \
+                                       (K3_CLUSTER3_MSMC_PORT != UNUSED))
+
+#define UNUSED                         -1
+
+#if !defined(K3_CLUSTER1_CORE_COUNT) || !defined(K3_CLUSTER1_MSMC_PORT)
+#define K3_CLUSTER1_CORE_COUNT         0
+#define K3_CLUSTER1_MSMC_PORT          UNUSED
+#endif
+
+#if !defined(K3_CLUSTER2_CORE_COUNT) || !defined(K3_CLUSTER2_MSMC_PORT)
+#define K3_CLUSTER2_CORE_COUNT         0
+#define K3_CLUSTER2_MSMC_PORT          UNUSED
+#endif
+
+#if !defined(K3_CLUSTER3_CORE_COUNT) || !defined(K3_CLUSTER3_MSMC_PORT)
+#define K3_CLUSTER3_CORE_COUNT         0
+#define K3_CLUSTER3_MSMC_PORT          UNUSED
+#endif
+
+#if K3_CLUSTER0_MSMC_PORT == UNUSED
+#error "ARM cluster 0 must be used"
+#endif
+
+#if ((K3_CLUSTER1_MSMC_PORT == UNUSED) && (K3_CLUSTER1_CORE_COUNT != 0)) || \
+    ((K3_CLUSTER2_MSMC_PORT == UNUSED) && (K3_CLUSTER2_CORE_COUNT != 0)) || \
+    ((K3_CLUSTER3_MSMC_PORT == UNUSED) && (K3_CLUSTER3_CORE_COUNT != 0))
+#error "Unused ports must have 0 ARM cores"
+#endif
+
+#define PLATFORM_CLUSTER_OFFSET                K3_CLUSTER0_MSMC_PORT
+
 #define PLAT_NUM_PWR_DOMAINS           (PLATFORM_CLUSTER_COUNT + \
                                        PLATFORM_CORE_COUNT)
 #define PLAT_MAX_PWR_LVL               MPIDR_AFFLVL1